27th Euromicro Conference Series on Digital System Design (DSD) 2024 will be held at Sorbonne University, Paris, France, from 28th to 30th of August 2024.

This edition will mark a milestone as we celebrate the 50th Anniversary of Euromicro and Euromicro Conferences.


Call for Papers

The Euromicro Conference on Digital System Design (DSD) addresses all aspects of (embedded, pervasive and high-performance) digital and mixed HW/SW system development and covers the entire design process from specification to microarchitectures, digital circuits and VLSI implementations. It is a forum for researchers and engineers from academia and industry working on advanced research, development and applications. It focuses on the current and future challenges of: advanced embedded, high-performance and cyber-physical applications; system and processor architectures for embedded and high performance HW/SW systems; design methodology and design automation for all design levels of embedded, high performance and cyber-physical systems; modern implementation technologies ranging from full-custom circuits in nanometer technology nodes to FPGAs and MPSoC infrastructures. Authors are cordially invited to submit their work on (but not limited to) the topics of the main track of the conference. In addition, contributions to various special sessions (with dedicated coordinators and sub-program committees) on specific topics of special interest are welcome. All papers will be reviewed according to common guidelines, quality requirements and acceptance thresholds.

Main Topics

  • Artificial intelligence from edge to cloud: architectures, methods, tools and applications
  • Design and synthesis of systems, hardware and embedded software – specification, modelling, analysis, validation and testing
  • Design automation at system, processor, register-transfer, logic and physical levels
  • Formal methods in system and hardware design
  • IoT, cyber-physical, embedded systems and applications
  • Systems-on-a-chip, networks-on-a-chip and systems-in-a-package
  • High-performance, energy-efficient multi-core and many-core (heterogeneous) processor architectures.
  • Autonomous/adaptable/reconfigurable systems and architectures
  • Security, safety, reliability and multi-objective optimization of embedded and cyber-physical systems
  • Future trends, new applications and new technologies

Special sessions

Important dates

  • Deadline for paper submission:  5th May 2024
  • Notification of acceptance: 12th June 2024
  • Camera ready papers: 26th June 2024

Submission guidelines

  • Authors are encouraged to submit their manuscripts via EasyChair web service at web page https://easychair.org/conferences/?conf=dsd2024. Should an unexpected web access problem be encountered, please contact the Program Chairs Frédéric Pétrot (frederic.petrot@univ-grenoble-alpes.fr) and Tomasz Kryjak (tomasz.kryjak@agh.edu.pl)
  • Each manuscript should include the complete paper text, all illustrations, and references. The manuscript should conform to the IEEE format: single-spaced, double column, US letter page size, 10-point size Times Roman font, up to 8 pages. In order to conduct a blind review, no indication of the authors’ names should appear in the manuscript, references included. However, but authors should not hide previous work, instead, they need to make self-references in the third person.
  • IEEE Conference Publishing Services (CPS) will publish accepted papers in the conference proceedings and the proceedings will be submitted to the IEEE Xplore Digital library and indexing services.

IEEE No-Show Policy

Please take note that IEEE has a strict policy on no-show. Therefore, if your paper is accepted, one of the authors and their representatives MUST PRESENT their paper at the conference. Papers with no-show participants without a valid reason will not be submitted to IEEE Xplore. No refund of the paid fees may be claimed by the no-show author.

Journal Publication

Authors of the selected best papers will be invited to submit extended versions of their research to the ISI indexed Euromicro/Elsevier journal ”Microprocessors and Microsystems: Embedded Hardware Design” (MICPRO) which has an 2022 Impact Factor of 2.6 and Cite Score of 4.9.


The proceedings of the DSD conference are indexed in the following databases:

Keynote speakers


Dr. Yervant Zorian is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and several other symposia and workshops.

Dr. Zorian holds 35 US patents, has authored four books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia’s National Medal of Science.

He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.



Philippe Notton is the CEO and Founder of SiPearl, the French company designing the European high-performance, low-power microprocessor. His original vision of SiPearl came in 2015 while he was leading a division of 2400 engineers at STMicroelectronics. In 2017, he joined Atos to set up the European Processor Initiative (EPI) consortium, which aimed to foster the return of high-performance microprocessor design to Europe. In June 2019, he launched SiPearl as a spin-off of the EPI with the support of the European Union. He assembled a team of experts and managers from Atos, STMicroelectronics, Marvell, Intel, Nokia and MediaTek and now employs more than 170 engineers in France (Maisons-Laffitte, Grenoble, Massy, Sophia Antipolis), Germany (Duisburg) and Spain (Barcelona). SiPearl’s first generation microprocessor, named Rhea1, will equip JUPITER, the first European exascale supercomputer.
As a senior executive, Philippe Notton has built an outstanding track-record in the multimedia, semiconductor and security fields. Passionate about high technology and fast-moving environments, he has worked in France, the UK and the US for market-leading groups (Thomson, Canal+, LSI Logic, STMicroelectronics, Atos), as well as a successful startup (MStar Semiconductor, sold to MediaTek in 2012 for US$4B).
Philippe Notton is a Supélec engineer (1993) and has an Executive MBA from ESSEC & Mannheim (2008).


Danilo Pau is Technical Director, IEEE AAIA & ST Fellow, APSIPA Life Member in STMicroelectronics. Danilo (h-index 27, i10-index 74) graduated at Politecnico di Milano. He worked on memory reduced HDMAC HW design, MPEG2 video memory reduction. on video coding, transcoding, embedded (Khronos) 2/3D graphics, and (ISO/IEC/MPEG CDVS and CDVA standards) computer vision. Currently, his work focuses on the ST Unified AI Core Technology, In Sensor AI Learning, Neural Networks Watermarking. He enjoys supervising many students.

Keynote: nW Range Tiny Reconfigurable Inference for Pascal Accurate Pressure Sensor Drift Compensation


Will be announced later.


Early bird registration finish: 1st July 2024

Will be announced later.

Venue and travel

Sorbonne University, Paris, France.

More details will be announced later.



DSD Steering Committee:

  • Lech Jóźwiak (Eindhoven University of Technology, NL) – Chairman
  • Paris Kitsos (University of Peloponnese, GR)
  • Tomasz Kryjak (AGH University of Krakow, PL)
  • Hana Kubatova (Czech Technical University in Prague, CZ)
  • Francesco Leporati (University of Pavia, IT)
  • José Silva Matos (University of Porto, PT)
  • Smail Niar (Polytechnic University of Hauts de-France, FR)
  • António Nuñez (University of Las Palmas de Gran Canaria, ES)
  • Eugenio Villar (University of Cantabria, ES)

DSD 2024 General Chairs:

  • Lilia Zaourar (CEA, FR)
  • Andrea Pinna (Sorbonne University, FR)

DSD 2024 Program Chairs:

DSD 2024 Publication Chair:

  • Amund Skavhaug (Norwegian Institute of Science and Technology, NO)

DSD 2024 Publicity Chair:

  • João Canas Ferreira (Univeristy of Porto, PT)

DSD 2024 Finance Co-Chairs:

  • Francesco Leporati (University of Pavia, IT)
  • Karl-Erwin Grosspietsch (Euromicro, DE)

DSD 2024 Technical Program Committee:

Status 31.01.2024

  • Ihsen  Alouani (Polytechnic University Hauts-de-France),
  • Hadjer Benmeziane (Polytechnic University of Hauts de-France),
  • Jalil Boukhobza (ENSTA-Bretagne),
  • Halima Bouzidi (Polytechnic University of Hauts de-France),
  • José  Cano  (University of Glasgow),
  • Pedro P. Carballo (University of Las Palmas de Gran Canaria),
  • Antonio  Carlos Schneider Beck (Federal University of Rio Grande do Sul),
  • Daniel Casini (School of Advanced Studies Sant’Anna),
  • Tom Chen (Colorado State University),
  • Alessandro Cilardo (University of Naples Federico II),
  • Giovanni Danese (University of Pavia),
  • Karol Desnos (INSA Rennes),
  • Tiago  Dias (Instituto Superior de Engenharia de Lisboa),
  • Rolf Drechsler (University of Bremen),
  • João Canas Ferreira (Univeristy of Porto),
  • Petr Fišer (Czech Technical University in Prague),
  • Roberto Giorgi (University of Siena),
  • Ouarnoughi Hamza (Polytechnic University of Hauts de-France),
  • Lech Jozwiak (Eindhoven University of Technology),
  • Ercan Kalali (Eindhoven University of Technology),
  • Oliver Keszocze (University of Erlangen–Nuremberg),
  • Mateusz Komorkiewicz (IEEE: VTS Chapter),
  • Tomasz Kryjak (AGH University of Krakow),
  • Hana Kubatova (Czech Technical University in Prague),
  • José  L. Abellán (University of Murcia),
  • Alexey Lastovetsky (University College Dublin),
  • Alberto Marchisio (New York University),
  • Maurizio  Martina (Polytechnic University of Turin),
  • Antonio Miele (Polytechnic University of Milan),
  • Sajid Mohamed (ITEC),
  • Sergey Mosin (Kazan Federal University),
  • Vojtech  Mrazek (Brno University of Technology),
  • Nadia Nedjah (State University of Rio de Janeiro),
  • Smail Niar (Polytechnic University of Hauts de-France),
  • Arnaldo Oliveira (University of Aveiro),
  • Alex Orailoglu (University of California San Diego),
  • Ozcan Ozturk (Bilkent University),
  • Frédéric Pétrot (Grenoble Alpes University),
  • Christian  Pilato (Polytechnic University of Milan),
  • Thilo Pionteck (Otto von Guericke University Magdeburg),
  • Sai Manoj  Pudukotai Dinakarrao (George Mason University),
  • Yang Qu (Broadcom),
  • Davide Quaglia (University of Verona),
  • Alfonso Rodriguez (Technical University of Madrid),
  • Tobias Scheipel (Graz University of Technology),
  • Jan Schmidt (Czech Technical University in Prague),
  • Nicolas Sklavos (University of Patras),
  • Radovan Stojanovic (University of Montenegro),
  • Emanuele Torti (University of Pavia),
  • Eugenio Villar (University of Cantabria),
  • Chao Wang (University of Science and Technology of China),
  • Arda Yurdakul (Boğaziçi University),
  • Andrej Zemva (University of Ljubljana),
  • Sepideh Safari (Institute for Research in Fundamental Sciences)

Feel free to contact us regarding any information or queries.