DSD Special Session
Scope
In the wake of RISC-V and its opensource ISA, this special session aims to gather recent and promising results around the comprehensive opensource hardware and software ecosystem, including RISC-V hardware implementations along with the opensource software tools, methodologies, and software stack to build end-to-end opensource computing devices. The name “MATTERV” can be pronounced “matter five”, all matters related to RISC-V, or “mate RV”, the mates, or companions, of RISC-V.
Topics
Authors are invited to submit regular papers following the submission guidelines. Topics include but are not limited to:
- RISC-V hardware implementations (extensions, SIMD, packed instructions, micro-architecture optimisations)
- system integration, hardware accelerators
- opensource software tools for design, evaluation, verification, validation, simulation
- opensource software stack, OS support, virtualisers, hypervisors, compilers and runtime
- opensource (hardware and software) for reliability, quality, fault-tolerance, security
- open educational resources for RISC-V digital design education
Special Session Chairs
- Tobias Scheipel, Graz University of Technology
- Lilia Zaourar, CEA LIST LCE
- César Fuguet, Inria – TIMA / Université Grenoble-Alpes
- Marcel Baunach, Graz University of Technology
Technical Program Committee
- Ali Ziya Alkar, Hacettepe University, Turkey
- Lluc Alvarez, Barcelona Supercomputing Center, Spain
- Marcel Baunach, Graz University of Technology
- Teresa Cervero, Barcelona Supercomputing Center, Spain
- Alessandra Dolmeta, Politecnico di Torino, Italy
- César Fuguet, Inria – TIMA / Université Grenoble-Alpes, France
- Angela Gonzalez, PlanV, Germany
- Thad Meyer, Auxsend LLC, USA
- Joonas Multanen, Tampere University, Finland
- Pierre Ravenel, Uppsala University, Sweden
- Tobias Scheipel, Graz University of Technology, Austria
- Ji Qiu, PLCT Lab, Institute of Software Chinese Academic of Science, China
- Lilia Zaourar, CEA-List, France